The present invention relates to a microprocessor having a debug interruption function used when debugging a user program. More specifically, this invention relates to a microprocessor which makes it possible to easily debug a user program without requiring any specified hardware such as an emulator for that purpose.
There is known a simulator system and an emulator system as representative methods for checking or debugging the programs during the development of programs for a microprocessor. In the simulator system, operations of a target microprocessor are simulated with software (a target program) on a host computer for assessing the target program.
In this simulator system, operations of a microprocessor chip and situations therearound are modeled by simulating the operations or situations utilizing the target program, so that the simulator system has no physical connection with a system (target system) having a microprocessor as an object for debugging. Because there is no physical connection with a system (target system) having the microprocessor, it is difficult to accurately simulate a state caused by an interruption processing actually generated in the target system. Therefore, usually the emulator system is used for checking or debugging a more advanced program including the interruption processing.
In the emulator system, operations of a microprocessor in a target system having chips each mass produced and incorporated in an application device respectively (described as mass production chip hereinafter) are emulated utilizing an emulator, and a program for the target system is checked and debugged by realizing the operating state.
Herein a work for debugging with an emulator is generally executed using a debug program. This debug program is booted each time reset interruption or interruption for a break command or the like is generated. The debug program analyzes, when the user program is interrupted due to the interruption, various execution parameters at a point of time when execution of the user program is interrupted.
The interruption as described above is controlled by a CPU (Central Processing Unit) of the microprocessor, so that also the debug program is started in association with the interruption processing by this CPU. The processing for starting a debug program is described below.
When a reset interruption or a break command is generated during execution of a user program in an environment in which the emulator is connected to a target system, the CPU of the microprocessor stores an address of a command next to the command currently being executed in a stack, and sets the address at an interruption vector of a vector table in a program counter (PC). Execution of the user program is interrupted with this processing.
An address stored in the interruption vector indicates a start address of a debug program. The CPU executes the debug program by repeating command fetch with respect to the address set in the program counter. When a return command is executed in the debug program, the address stored in the stack is set in the program counter, and the user program is restored from the interrupted state.
As described above, when debugging a user program run on a microprocessor, environment in which the two programs, namely a user program and a debug program can be operated alternately is required. Therefore, generally an address area to be used by a user (described as a user space hereinafter) namely an area for storage and operation of a user program, and an address area used for debugging (described as a system space hereinafter) namely an area for storage and operations of a debug program are completely separated from each other.
In recent years, there has been developed and put into practical use a microprocessor having the JTAG (Joint Test Action Group) interface based on the IEEE1149.1 standards and enabling a boundary scan test and debugging. In this microprocessor, an interruption vector for debugging is prepared, and it is possible to serially provide a debug program via the JTAG interface.
When debugging a microprocessor having the JTAG interface as described above, at first a target system having a microprocessor to be debugged is connected to the emulator based on the JTAG, and a work address area for debugging is set in the system space. When the CPU receives the debug interruption described above, the CPU waits for supply of commands each constituting the debug program from the JTAG interface, and executes these supplied commands one by one.
In development of microprocessor products in recent years, an emulation chip for checking operations of software for mass production chips as well as for operations of peripheral devices is developed prior to development of the mass production chips themselves. Especially microprocessors now available from the market have the same CPU but different peripheral functions, so that an emulator for the target product comprises a CPU emulator for the CPU section and an emulator for the peripheral functions. Thus, emulation for various types of microprocessor can be executed by changing only the emulator for the peripheral functions.
However, it is very inefficient to develop an emulator for the peripheral functions for each product. In order to solve this problem, each chip incorporates a circuit for realizing functions of an emulation chip therein and is designed in such a away that the chip can operate as an emulator for peripheral functions in response to a level of a signal inputted from the outside.
When debugging a microprocessor capable of being run as an emulation chip as a target system, a debug program can be supplied in parallel via an interface for signal input/output to and from the outside for operating the chip as an emulator (described as an emulation interface hereinafter). In such a case, an emulator that incorporates an emulation chip and also which has an emulation interface is required.
In the microprocessor as described above, however, a specific hardware environment such as an emulator is required in order to access the system, so that it has been impossible to debug a user program by utilizing the debug interruption functions prepared in the CPU in a simple manner.
It is an object of the present invention to provide a microprocessor capable of debugging a user program by effectively utilizing the interruption function in a simple manner without requiring any specific hardware such as an emulator.
With the present invention, using a vector address switching unit provided in a CPU core, a first address or a second address can selectively specified as a debug interruption vector address as desired, so that either the first address or the second address can be allocated to an address area accessible by a user as an area for storage of a debug program.
With the present invention, the first address and the second address each capable of being selectively specified by the vector address switching unit are allocated as an address in an address area accessible for a user and an address in an address area for debugging respectively.
With the invention, conditions for interruption different from the debug interruption functions previously prepared in a microprocessor (for instance, in a CPU core) are monitored, and a debug module for debugging a user program according to a debug program specifies an address switched by the vector address switching unit according to a debug module signal, so that the address can be switched in correlation to start of the debug module.
With the present invention, a JTAG unit and a JTAG interface is provided, and when a prespecified command is inputted into the JTAG unit via the JTAG interface, the JTAG unit shifts the debug module to an enabled state, so that address switching by the vector address switching unit can be specified by external hardware such as an emulator connected to the JTAG interface.
With the present invention, a debug program is written in an address area in which a first address is present in correlation to execution of a user program, so that debug programs for various types of debug processing can selectively be executed.
With the present invention, address switching by the vector address switching unit is executed in response to a switching signal outputted from a combining unit according to a combination of states of mode signals inputted from a plurality of mode terminals, so that the first address or the second addresses can selectively be specified as a debug interruption vector address regardless of whether any specific hardware such as an emulator is connected or not.
With the present invention, a debug module has an enable bit which can be updated (changed) via a system bus (data bus or address bus), and when this enable bit is updated to the enabled state, conditions for interruption different from the debug interruption functions originally prepared in a microprocessor (for instance, in a CPU core) are monitored, and a user system is debugged according to a debug program, so that conditions for interruption can be switched by making use of the system bus.
With the present invention, when a specified command is inputted into the JTAG unit via the JTAG interface, the JTAG unit rewrites an enable bit of a debug module to a signal indicating the enabled state, so that conditions for interruption can be updated (changed) with an external hardware such as an emulator connected to the JTAG interface.
With the present invention, a microprocessor has a function for operating the microprocessor as a mass production chip and a function for operating the microprocessor as an emulation chip, and specifies the vector address switching unit to switch to the first address or to the second address as a debug interruption vector address, so that debug processing can be executed without requiring any specific mechanism such as a debug module or a JTAG unit.